Drimva

Amazon

ASIC Engineer Intern, Annapurna Labs - 2027

$116K–$134K

Austin, TX +2 · Internship · Posted Aug 27, 2026

Location
Austin, TX
Seattle, WA
Cupertino, CA
Experience
No number of years stated; coursework or project experience required. Prior internship, research, or lab experience is preferred.
Education
Currently enrolled in a Bachelor's or Master's degree program in Electrical Engineering, Computer Engineering, Computer Science, or a related field; final graduation date of December 2027 or later.

About the job

Contributes to custom ASIC development, including RTL design, verification, physical design support, and debugging, in a team matched to the intern’s interests and strengths.

What you'll do

  • Design and implement RTL for digital logic blocks; develop and run verification to validate functionality and coverage.
  • Support synthesis, timing analysis, and physical design flows; debug design issues through simulation and analysis.
  • Collaborate across chip development teams, document design decisions, and present work.

What they ask for

  • Currently enrolled in a Bachelor's or Master's program in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with a final graduation date of December 2027 or later.
  • Coursework or project experience in digital logic design and computer architecture.
  • Familiarity with Verilog, SystemVerilog, or VHDL.
  • Understanding of combinational and sequential logic, finite state machines, timing, and clocking.

Nice to have

  • Experience with practical semiconductor ASIC design, verification platforms, industry-standard EDA tools, or scripting for design-flow automation.
  • Degree focus in VLSI, digital design, or computer architecture; prior chip design, embedded systems, or hardware-development experience.

Pay

116,100.00 USD Annually (base salary); 133,600.00 USD Annually (base salary); 116,100.00 USD Annually (base salary)

Tools

Verilog, SystemVerilog, VHDL, UVM, FPGA, Cadence, Synopsys, Python

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 5, 2026 (UTC)