Drimva

Amazon

ASIC Formal Verification Engineer I, Annapurna Labs

$116K–$134K

Austin, TX +1 · Full-time · Posted Oct 22, 2026

Location
Austin, TX
Cupertino, CA
Education
Bachelor’s or Master’s degree

About the job

Defines hardware specifications for critical machine-learning accelerator modules and uses formal methods and model checkers to verify that hardware designs match those specifications.

What you'll do

  • Understand hardware-block requirements and write functional specifications using Verilog and SystemVerilog Assertions (SVA).
  • Use industrial model checkers and proof techniques, including abstractions and inductive reasoning, to verify hardware designs.
  • Use automation and scripting flows to accelerate verification.

What they ask for

  • Earned or will earn a Bachelor’s or Master’s degree.
  • Completed coursework or prior internship experience with formal methods (software or hardware).
  • Coursework or prior internship experience in computer architecture basics.

Nice to have

  • Experience with hardware model checkers such as JasperGold or VC Formal, and/or RTL Verilog.
  • Knowledge of formalization techniques or experience with scripting languages such as Python or TCL.

Pay

116,100.00 USD Annually (base salary); 133,600.00 USD Annually (base salary)

Tools

Verilog, System Verilog Assertions (SVA), JasperGold, VC Formal, RTL Verilog, Python, TCL

Model-written summary · the original posting is authoritative

First seen Oct 23, 2026 · Last verified Nov 5, 2026 (UTC)