Drimva

Amazon

Signal & Power Integrity Engineer, Annapurna Labs - AI Silicon Packaging

$154K–$247K

Austin, TX +2 · Full-time · Posted Sep 8, 2026

Location
Austin, TX
San Diego, CA
Cupertino, CA
Experience
5+ years of experience in signal integrity, power integrity, or package design; preferred qualifications also list 3+ years in these areas.
Education
Bachelor's degree in Electrical Engineering or a related field.

About the job

Performs package-level signal or power integrity analysis and optimization for advanced packaging used in next-generation machine-learning and data-center ASICs.

What you'll do

  • Run package SI/PI and high-speed channel simulations, build and validate models, and support package stack-up design.
  • Coordinate package co-optimization with silicon and board teams and identify manufacturing risks with mitigation approaches.
  • Analyze advanced interconnects, package PDN performance, and decoupling technologies.

What they ask for

  • Bachelor's degree in Electrical Engineering or a related field.
  • Solid understanding of either SI or PI, with working awareness of the other.
  • Experience with EM simulation and SI/PI tools such as HFSS, Cadence Sigrity (PowerSI, PowerDC, Clarity), ADS, or equivalent.
  • Understanding of advanced packaging technologies and familiarity with stack-up design and impedance control.

Nice to have

  • Master's degree in Electrical Engineering or a related field.
  • Exposure to high-speed serial protocols, lab measurement correlation, or package co-design methodologies.

Pay

176,600.00 - 247,300.00 USD annually (base salary); 153,600.00 - 215,000.00 USD annually (base salary)

Tools

HFSS, Cadence Sigrity (PowerSI, PowerDC, Clarity), ADS, PCIe, UCIe, TDR, VNA, oscilloscope

AI focus

Supports SI/PI analysis and optimization for advanced packaging solutions for next-generation machine-learning ASICs.

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 5, 2026 (UTC)