Amazon
Sr. Design Verification Engineer, Amazon Leo
$185K–$288K
Austin, TX +3 · Senior · Full-time · Posted Aug 28, 2026
- Location
- Austin, TX
Sunnyvale, CA
Irvine, CA
San Diego, CA - Experience
- 3+ years of UVM, C, System C, and scripting experience; 7+ years in verification. Preferred: 10+ years in digital verification.
- Education
- Bachelor's degree in Computer Science, Computer Engineering, or Electrical Engineering; preferred Master's or Ph.D degree in Electrical / Communications Engineering.
- Visa sponsorship
- Candidates must be a U.S. citizen or national, U.S. permanent resident (current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.
About the job
Verifies digital IP, subsystem, and SoC designs for satellite communications chips, developing test environments and plans, running regressions, and debugging system-level scenarios.
What you'll do
- Build verification environments and test plans, write tests, run regressions, and track coverage and progress.
- Debug communication scenarios in pre-silicon and post-silicon environments and participate in system-level verification.
- Automate regression-failure triage and report issues to stakeholders.
What they ask for
- Bachelor's degree in Computer Science, Computer Engineering, or Electrical Engineering.
- 3+ years of UVM, C, System C, and scripting experience.
- 7+ years in verification, preferably in communication systems.
Nice to have
- Master's or Ph.D degree in Electrical / Communications Engineering; 10+ years in digital verification, preferably in communication systems.
- AI/LLM tools for verification workflows; Matlab, modem design verification, System C or Matlab model development or DV integration, or formal verification techniques.
Pay
185,200.00 - 250,000.00 USD annually (base salary); 185,200.00 - 250,000.00 USD annually (base salary); 213,000.00 - 287,500.00 USD annually (base salary); 185,200.00 - 250,000.00 USD annually (base salary)
Tools
UVM, C, System C, DPI-C, Matlab
AI focus
Preferred use of AI/LLM tools to accelerate verification workflows, including AI-assisted test plans, test case generation, debug, and human-in-the-loop coverage sign-off review.
Model-written summary · the original posting is authoritative