Drimva

Anduril

FPGA Verification Engineer, Air Dominance and Strike

$146K–$194K

Costa Mesa, California, United States · Full-time · Posted Aug 19, 2026

Experience
2+ years required; 5+ years preferred.
Education
Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field; master’s degree preferred.

About the job

Owns verification of AMD (Xilinx) FPGA/SoC designs for flight-critical avionics using UVM and coverage-driven methods.

What you'll do

  • Architect UVM verification environments, test sequences, coverage models, and regression suites; analyze results and debug failures.
  • Create verification plans traceable to requirements, author SVA, and prepare verification closure and coverage reports.
  • Collaborate on RTL reviews and bug resolution, support hardware validation and board bring-up, and ensure verification meets DO-254 and relevant safety standards.

What they ask for

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.
  • 2+ years of experience in FPGA/ASIC verification.
  • Proficiency in SystemVerilog, UVM methodology, SVA, and object-oriented programming principles.
  • Experience with an industry simulator (Questa, VCS, Xcelium, or Vivado), Git-based collaborative workflows, and Linux; eligible to obtain and hold a U.S. Secret security clearance.

Nice to have

  • 5+ years of FPGA/ASIC verification experience; master’s degree in Electrical Engineering, Computer Engineering, or related field.
  • DO-254 or avionics verification, unit-testing frameworks, formal or CDC verification tools, digital interfaces, automation scripting, SoC/ARM platforms, or CI/CD and Nix-based build environments.

Pay

$146,000–$194,000 USD (base salary)

Tools

AMD (Xilinx), SystemVerilog, UVM, SVA, Questa, VCS, Xcelium, Vivado

Model-written summary · the original posting is authoritative

First seen Oct 10, 2026 · Last verified Nov 6, 2026 (UTC)