Drimva

Anduril

Senior Digital Design Engineer, Air Dominance and Strike

$166K–$220K

Costa Mesa, California, United States · Senior · Full-time · Posted Sep 2, 2026

Experience
8+ years of FPGA, ASIC, or closely related digital design experience; 12+ years of FPGA development preferred.
Education
Bachelor's degree in Electrical Engineering, Computer Engineering, or related field.
Visa sponsorship
Eligible to obtain and maintain an active U.S. Secret security clearance.

About the job

Designs, implements, verifies, and integrates FPGA and SoC RTL for embedded, avionics, and mission-critical systems.

What you'll do

  • Develop RTL and translate system requirements into microarchitecture and implementation plans.
  • Own FPGA designs through simulation, synthesis, timing closure, lab debug, and system integration.
  • Support board bring-up and collaborate across hardware, software, systems, and verification teams.

What they ask for

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or related field.
  • 8+ years of FPGA, ASIC, or closely related digital design experience.
  • Proficiency in VHDL and/or Verilog/SystemVerilog, with hands-on FPGA implementation, timing-closure, and hardware-debug experience.
  • Proficiency with Linux-based development environments, Git-based workflows, and Tcl and/or Python scripting; eligible to obtain and maintain an active U.S. Secret security clearance.

Nice to have

  • 12+ years of FPGA development experience.
  • Experience owning a major FPGA block or design through integration; familiarity with FPGA vendor environments, embedded co-design, interfaces, or safety-critical standards.

Pay

$166,000 — $220,000 USD (base salary)

Tools

VHDL, Verilog, SystemVerilog, Linux, Git, Tcl, Python, AMD (Xilinx) Vitis

Model-written summary · the original posting is authoritative

First seen Oct 10, 2026 · Last verified Nov 6, 2026 (UTC)