Anduril
Senior FPGA Verification Engineer, Air Dominance and Strike
$166K–$220K
Costa Mesa, California, United States · Senior · Full-time · Posted Sep 2, 2026
- Experience
- 8+ years of experience in FPGA/ASIC verification; 12+ years preferred.
- Education
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field; Master’s degree preferred.
About the job
Own verification of FPGA/SoC designs on AMD (Xilinx) platforms for flight-critical avionics, using UVM-based, coverage-driven methods.
What you'll do
- Architect UVM verification environments, plans, assertions, coverage models, and regression suites for FPGA/SoC designs.
- Debug simulation failures and collaborate with design engineers on RTL reviews, bug resolution, and micro-architecture refinement.
- Support hardware validation and board bring-up, and ensure verification meets DO-254 and relevant safety standards.
What they ask for
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.
- Proficient in SystemVerilog, UVM methodology, SVA, and object-oriented programming principles.
- Experience with industry simulators (Questa, VCS, Xcelium, or Vivado), Git-based collaborative workflows, and Linux development environments.
- Eligible to obtain and hold a U.S. Secret security clearance.
Nice to have
- DO-254, avionics verification standards for UAS, and safety-critical verification processes.
- Formal verification or CDC verification tools.
Pay
$166,000 — $220,000 USD (base salary)
Tools
AMD (Xilinx), SystemVerilog, UVM, SVA, Questa, VCS, Xcelium, Vivado
Model-written summary · the original posting is authoritative