Apple
ASIC Design and Integration Engineer
$150K–$278K
Beaverton, Oregon +1 · Full-time · Posted Apr 10, 2026
- Location
- Beaverton, Oregon
Cupertino, California - Experience
- Minimum of 3 years relevant industry experience; preferred qualifications also state 3+ years of ASIC design experience.
- Education
- BS; preferred Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
About the job
Design, implement, verify, and integrate custom ASICs and digital designs for complex SoCs, optimizing timing and power.
What you'll do
- Develop RTL using SystemVerilog and perform synthesis; design and verify complex ASICs.
- Coordinate with simulation-based and formal verification teams and integrate designs with hardware and software teams.
- Conduct timing analysis and power optimization, and create micro-architecture and design documentation.
What they ask for
- Minimum of BS + 3 years relevant industry experience.
Nice to have
- Experience with high-speed I/O design and protocols; knowledge of PCIe is a plus.
- Familiarity with custom ASIC design, FPGA prototyping, front-end chip development processes, and low-power design techniques.
Pay
$150,400 and $277,600 (base salary range)
Tools
SystemVerilog, PCIe, ASIC, SoCs, FPGA, CDC/RDC, LINT, LEC
Model-written summary · the original posting is authoritative