Drimva

Apple

ASIC Design and Integration Engineer

$150K–$278K

Cupertino, California · Full-time · Posted Oct 19, 2026

Experience
Minimum 3 years of relevant industry experience.
Education
BS

About the job

Designs and integrates ASIC/SOC logic and IP, supporting front-end implementation and collaborating with hardware, software, and systems teams.

What you'll do

  • Write microarchitecture and design specifications; design, implement, and debug complex logic.
  • Integrate complex IPs into the SOC and support front-end activities including Lint, CDC, RDC, Synthesis, and ECO.
  • Collaborate with SOC design, verification, emulation, STA, physical design, software, and systems teams.

What they ask for

  • BS degree.
  • At least 3 years of relevant industry experience.

Nice to have

  • Verilog RTL logic design; knowledge of CDC and low-power methodologies.
  • Scripting familiarity with Perl, Python, or Tcl; familiarity with GenAI tools and workflows.

Pay

$150,400 and $277,600 (USD base salary range)

Tools

Verilog, Perl, Python, Tcl, Lint, CDC, RDC, Synthesis

AI focus

Familiarity with GenAI tools and workflows is preferred; no specific AI development duties are stated.

Model-written summary · the original posting is authoritative

First seen Oct 20, 2026 · Last verified Nov 5, 2026 (UTC)