Apple
ASIC Design Engineer
$185K–$325K
Santa Clara, California · Full-time · Posted Apr 10, 2026
- Experience
- +10 Years of Experience
- Education
- Bachelor's Degree
About the job
Design and develop ASIC memory architectures and RTL for high-performance systems, evaluating performance, area, and power trade-offs.
What you'll do
- Research or develop memory and highly interconnected system architectures.
- Explore architecture and feature trade-offs in system performance, area, and power; develop memory hierarchies for high-performance parallel computer architectures.
- Work with performance teams on performance/power simulators, models, and test suites; characterize performance and document results.
What they ask for
- Bachelor's Degree
- Experience in ASIC design
- Experience in architecture research and/or development of memory or highly interconnected system architectures
- Experience with RTL/micro-architecture
Nice to have
- Knowledge of high-performance memory subsystems, including DRAM controllers, PHY architecture and design, DFI interfaces, and DRAM interface calibration/training mechanisms and algorithms
- Systems experience characterizing performance, conducting comparison studies, and documenting and publishing results
Pay
$184,700 and $324,800 (base salary)
Tools
ASIC, RTL, DRAM, PHY, DFI, SOC
Model-written summary · the original posting is authoritative