Apple
ASIC Design Engineer
Beaverton, Oregon · Full-time · Posted Apr 10, 2026
- Experience
- Minimum of 10 years of relevant industry experience.
- Education
- BS
About the job
Design, implement, debug, and integrate ASIC logic for SoCs, supporting front-end integration and collaborating with verification, physical design, software, and systems teams.
What you'll do
- Write microarchitecture and/or design specifications; design, implement, and debug complex logic.
- Integrate IPs into SoCs and support front-end activities such as Lint, CDC, Synthesis, and ECO.
- Collaborate with SoC, verification, emulation, STA, physical design, software, and systems teams.
What they ask for
- BS degree.
- At least 10 years of relevant industry experience.
- Verilog RTL logic design experience.
Nice to have
- Experience with specifications, multiple clock domains, asynchronous interfaces, and front-end chip development tools and methodologies.
- Knowledge of system architecture, CPU and IP integration, power and clock management, or scripting languages such as Perl, Python, or TCL.
Tools
Verilog RTL, Lint, CDC, Synthesis, ECO, Perl, Python, TCL
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