Apple
ASIC Design Engineer
$129K–$195K
Santa Clara, California · Full-time · Posted May 14, 2026
- Experience
- +0 Years of Experience.
- Education
- Bachelor's Degree.
About the job
Design ASIC memory and interconnected-system architectures and RTL for upcoming Apple hardware products.
What you'll do
- Research or develop memory and highly interconnected system architectures, including RTL and micro-architecture.
- Explore trade-offs in system performance, area, and power, and develop memory hierarchies for high-performance parallel architectures.
- Work with performance teams on simulators, models, test suites, and performance characterization.
What they ask for
- Bachelor's Degree.
- Experience in ASIC design involving architecture research or development of memory or highly interconnected systems, and RTL/micro-architecture.
Nice to have
- Knowledge of high-performance memory subsystems, including DRAM controllers, PHY architecture and design, DFI interfaces, and DRAM calibration/training mechanisms and algorithms.
- Systems experience characterizing performance, comparing options, and documenting or publishing results.
Pay
$129,300 and $194,700 (base salary)
Tools
RTL, DRAM, PHY, DFI, system-on-a-chip SOC
Model-written summary · the original posting is authoritative