Apple
ASIC Design Engineer
$129K–$195K
Santa Clara, California · Full-time · Posted Oct 29, 2025
- Experience
- +0 years of experience.
- Education
- Bachelor's degree.
About the job
Design ASIC memory and highly interconnected system architectures for upcoming Apple hardware products.
What you'll do
- Research or develop memory and highly interconnected system architectures, including RTL and microarchitecture.
- Explore memory-system trade-offs in performance, area, and power, and develop memory hierarchies for high-performance parallel SoCs.
- Characterize system performance, conduct comparison studies, and document and publish results.
What they ask for
- Experience in ASIC design, including architecture research or development for memory or highly interconnected systems.
- Experience with RTL/microarchitecture.
- Bachelor's degree.
Nice to have
- Knowledge of high-performance memory subsystems, including DRAM controllers, PHY architecture and design, DFI, and DRAM calibration/training mechanisms and algorithms.
- Experience developing performance/power simulators, models, and test suites with performance teams.
Pay
$129,300 to $194,700 USD base salary
Tools
ASIC, RTL, DRAM, PHY, DFI, SOC
Model-written summary · the original posting is authoritative