Apple
ASIC Power Engineer
$175K–$325K
Irvine, California +2 · Full-time · Posted Oct 27, 2026
- Location
- Irvine, California
San Diego, California
Sunnyvale, California - Experience
- A minimum of 10 years of relevant industry experience.
- Education
- BS
About the job
Develop and validate power architecture, models, estimates, and reductions for wireless communication SoCs.
What you'll do
- Define power-efficient SoC architecture and specifications; estimate pre-silicon power and build application and atomic power models.
- Generate power vectors, collect and analyze pre-silicon power data, and identify power reductions.
- Support post-silicon power correlation and validation.
What they ask for
- ASIC power knowledge and understanding of ASIC logic design.
- Experience with power tools such as PTPX and Power Artist; knowledge of low-power design and UPF.
- Proficiency in Shell, Perl, or Python scripting.
- Basic knowledge of SoC components such as CPU, fabric, peripherals, and PCIe; strong analytical and problem-solving skills.
Nice to have
- Pre-silicon power estimation or modeling and post-silicon power correlation experience.
- Wireless knowledge (WIFI, BT, and UWB) or system architecture experience.
Pay
USD $175,000 to $308,500 base salary; USD $184,700 to $324,800 base salary
Tools
PTPX, Power Artist, UPF, Shell, Perl, Python, WIFI, BT
Model-written summary · the original posting is authoritative