Apple
CAD Engineer – EMIR Signoff
$216K–$325K
Austin, Texas +1 · Full-time · Posted Oct 5, 2026
- Location
- Austin, Texas
Sunnyvale, California - Experience
- 10+ years of relevant industry experience.
- Education
- BS.
About the job
Develop and support EMIR signoff methodologies and flows for complex mixed-signal SoC designs, ensuring verification and analysis criteria are met before tapeout.
What you'll do
- Define signoff requirements and develop or refine gate- and transistor-level EMIR signoff methodologies.
- Partner with Design, CAD, and Technology teams to configure and validate EDA flows and tools, and ensure signoff criteria are met.
- Provide frontline support for design-group enablement, enhancements, and debugging.
What they ask for
- BS degree.
- 10+ years of relevant industry experience.
Nice to have
- Experience in CAD, EMIR analysis, or related circuit design; knowledge of tools such as Redhawk, Voltus, and Totem.
- Experience with Perl and Python, CMOS analog or mixed-signal design, or AI/ML and LLM-based EDA automation or analysis.
Pay
USD $216,200 to $324,800 base salary
Tools
Redhawk, Voltus, Totem, Perl, Python
AI focus
The team is exploring AI/ML and LLM-driven techniques to accelerate analysis, automate flow debugging, and surface anomalies earlier in the design cycle; experience applying these techniques to EDA automation, anomaly detection, or signoff data analysis is preferred.
Model-written summary · the original posting is authoritative