Apple
CAD Engineer, Silicon Learning and Static Timing Analysis
$216K–$394K
Santa Clara, California · Full-time · Posted Nov 13, 2025
- Experience
- 20 years of relevant industry experience.
- Education
- BS
About the job
Analyzes silicon performance data and feeds findings into static timing analysis tools, flows, margins, and design-closure methods to improve processor performance, power, and battery life.
What you'll do
- Work with design, DFT, CAD, and product engineering teams to design experiments, analyze results, and refine design methodologies.
- Drive adoption of new static timing analysis technologies and mine silicon data for correlation with design-closure activities.
- Develop and deploy design-closure margins and methodologies that optimize power/performance tradeoffs.
What they ask for
- BS degree.
- 20 years of relevant industry experience.
- Coding experience in one or more of C, Perl, Python, or Tcl.
Nice to have
- Experience in static timing analysis, DFT, physical design, failure analysis, or CAD; experience with Primetime, Tempus, or equivalent.
- Coding/debug skills in C, Perl, Python, or Tcl, plus fundamentals of statistics, hypothesis testing, data mining, Machine Learning, and Design of Experiments; exposure to DFT, Tetramax, Tessent, silicon debug, or semiconductor processing is a plus.
Pay
$216,200 and $394,000 (base salary)
Tools
C, Perl, Python, Tcl, Primetime, Tempus, Tetramax, Tessent
AI focus
The posting lists Machine Learning fundamentals as preferred knowledge; the role focuses on data analysis and silicon performance rather than explicitly describing AI development.
Model-written summary · the original posting is authoritative