Apple
Cellular ASIC Design Engineer
$175K–$325K
Austin, Texas +2 · Full-time · Posted Apr 15, 2026
- Location
- Austin, Texas
San Diego, California
Sunnyvale, California - Experience
- 10+ years of relevant industry experience.
- Education
- BS
About the job
Develops and optimizes design methodologies and implementation for advanced cellular ASICs and SoCs, focusing on power, performance, area, and cost efficiency.
What you'll do
- Develop design flows and methodologies for synthesis, place-and-route, timing closure, and signoff.
- Analyze and improve physical design, timing, power, and performance, including validation across advanced process technologies.
- Collaborate across technology, IP, CAD, and design teams; automate methodologies and apply ML modeling for design optimization.
What they ask for
- BS degree and 10+ years of relevant industry experience.
- VLSI background and hands-on experience with RTL to GDSII flows.
- Experience optimizing SoC power, performance, area, and cost, including SoC power flows and Vmin optimization.
- Experience with design technology co-optimization and solving scaling bottlenecks in new technology nodes.
Nice to have
- Experience with metal stack optimization and early technology-node analysis.
- Experience applying data science and ML analytics to design databases or post-silicon data.
Pay
$175,000 and $308,500 USD base salary; $184,700 and $324,800 USD base salary
Tools
DC/DCT/DCG/Genus/Oasis, ICC2/Fusion/Innovus/Aprisa, PT/PT-SI/Tempus, Hspice/Finesim/AFS/Spectre/Infinisim, RedHawk/SeaHawk/Voltus, Python, Perl, TCL
AI focus
Apply ML modeling and data science/ML analytics for design optimization, predictive analysis, and trend identification.
Model-written summary · the original posting is authoritative