Apple
Circuit Design Engineer - Library
$142K–$278K
Beaverton, Oregon +2 · Full-time · Posted Aug 20, 2026
- Location
- Beaverton, Oregon
San Diego, California
Santa Clara, California - Experience
- Minimum of 3 years; preferred qualification specifies 3+ years in Standard cells circuit development.
- Education
- Bachelor's Degree
About the job
Leads custom digital circuit and library development for ASIC and processor designs, focusing on performance, power, integration, and technology-node enablement.
What you'll do
- Develop high-performance, low-power standard cells and power-management circuits; drive PPA improvements.
- Coordinate circuit integration requirements with CPU, SOC, and GPU teams and develop circuit QA checks and methodologies.
- Drive technology enablement, foundry layout-checker requirements, and standard-cell migration, verification, and releases.
What they ask for
- Bachelor's Degree and minimum of 3 years of experience.
Nice to have
- 3+ years of experience in Standard cells circuit development; experience developing and implementing circuit methodologies and leading or mentoring a small team.
- Knowledge of standard cell layout, DRM, DRC/LVS decks, PDV flows, Virtuoso, advanced-node device behavior, circuit robustness analysis, and scripting in Perl and/or TCL.
Pay
$142,300 and $263,300 (base salary); $150,400 and $277,600 (base salary)
Tools
DRM, DRC/LVS, PDV, Virtuoso, Perl, TCL
Model-written summary · the original posting is authoritative