Apple
Circuit Design Engineer - Library/Process Monitor
$150K–$278K
Beaverton, Oregon +1 · Full-time · Posted Aug 5, 2026
- Location
- Beaverton, Oregon
Santa Clara, California - Experience
- Minimum of 3 years of experience.
- Education
- Bachelor's Degree
About the job
Design and optimize standard-cell circuits and library PPA, and develop process-monitor IP for processor design and test chips.
What you'll do
- Contribute to library architecture and optimization across technologies, architectures, and PDK releases.
- Optimize layouts by identifying and reducing parasitics; develop standard-cell circuits to improve PPA.
- Design process-monitor IP in PNR blocks, validate other IPs in test chips, and coordinate physical-design requirements with CPU, SOC, and GPU teams.
What they ask for
- Bachelor's Degree
- Minimum of 3 years of experience
Nice to have
- Circuit-design experience with high-performance flip flops, level shifters, retention flops, or other complex circuits.
- Experience with RTL2GDSII flow and/or Static Timing Analysis (STA).
Pay
$150,400 and $277,600 (base salary)
Tools
PNR, PDK, RTL2GDSII, Static Timing Analysis (STA)
Model-written summary · the original posting is authoritative