Drimva

Apple

CPU Design Timing Engineer

Austin, Texas · Full-time · Posted Aug 28, 2026

Education
Minimum BS required

About the job

Own timing closure for a CPU project by developing timing flows, analyzing timing, and coordinating changes with implementation, RTL, and microarchitecture teams.

What you'll do

  • Work with the CAD team to develop project timing flows and write scripts to improve analysis and engineer efficiency.
  • Work with CPU micro-architects and implementation engineers to drive timing closure.
  • Support timing changes, analysis, and closure across the project.

What they ask for

  • Minimum BS required.
  • Experience writing scripts in one or more of TCL, Perl, or Python.

Nice to have

  • Implementation experience on high-performance CPU designs and working knowledge of CPU microarchitecture, low-power techniques, and physical design methodology and tools.
  • Experience with timing for 1 ghz+ designs, multiple clock and power domains, Primetime or Tempus, and cross-talk, noise, OCV, uncertainty, and derate methodology.

Tools

TCL, Perl, Python, Primetime, Tempus

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 4, 2026 (UTC)