Drimva

Apple

CPU Design Timing Engineer

Austin, Texas · Full-time · Posted Apr 24, 2026

Experience
3+ years of relevant industry experience.
Education
BS

About the job

Own CPU project timing closure by developing timing flows, analyzing timing, and coordinating changes with RTL, implementation, CAD, and microarchitecture teams.

What you'll do

  • Work with the CAD team to develop timing flows and scripting that improve analysis and engineer efficiency.
  • Partner with CPU micro-architects and implementation engineers to drive CPU timing closure.
  • Analyze timing and work with implementation and RTL teams on timing changes.

What they ask for

  • Bachelor’s degree and 3+ years of relevant industry experience.
  • Experience writing and debugging scripts in one or more of TCL, Perl, or Python.

Nice to have

  • Implementation experience on high-performance CPU designs and working knowledge of CPU microarchitecture, low-power techniques, and physical design tools and methodology.
  • Experience with timing for 1 ghz+ designs, multiple clock and power domains, Primetime or Tempus, and cross-talk, noise, OCV, uncertainty, and derate methodology.

Tools

TCL, Perl, Python, Primetime, Tempus

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 4, 2026 (UTC)