Drimva

Apple

CPU Design Timing Engineer

Beaverton, Oregon · Full-time · Posted Jun 12, 2026

Experience
10+ years of relevant industry experience.
Education
BS

About the job

Drive timing closure for CPU projects, developing timing flows and improving analysis efficiency in collaboration with CAD, microarchitecture, and implementation teams.

What you'll do

  • Develop project timing flows with the CAD team, including scripts to improve analysis and engineering efficiency.
  • Work with CPU micro-architects and implementation engineers to drive CPU timing closure.

What they ask for

  • BS degree.
  • Experience with timing for 1 GHz+ designs, including multiple clock and power domains.
  • Experience with PrimeTime or Tempus static timing tools.
  • Experience with crosstalk, noise, OCV, uncertainty, and derate methodology; scripting and debugging in TCL, Perl, or Python.

Nice to have

  • Implementation experience on high-performance CPU designs.
  • Knowledge of CPU microarchitecture, physical design tools and methodologies, and static timing flows.

Tools

PrimeTime, Tempus, TCL, Perl, Python

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 5, 2026 (UTC)