Apple
CPU Full-chip Physical Integration Engineer
Beaverton, Oregon · Full-time · Posted Jun 12, 2026
- Experience
- 10+ years of relevant industry experience.
- Education
- Minimum BS.
About the job
Integrate and verify CPU physical designs, from floorplanning and place-and-route through signoff closure for tapeout.
What you'll do
- Own chip-level place-and-route, final CPU layout database construction, and physical design verification.
- Develop and validate power grids; drive layout integration and chip-level EM/IR, electrical, and formal verification.
- Work with implementation, CAD, and SoC teams on signoff, delivery requirements, and physical-design methodologies.
What they ask for
- Bachelor’s degree (BS) and 10+ years of relevant industry experience.
- Scripting experience in Perl or TCL.
Nice to have
- Knowledge of physical-design practices, including floorplanning, partitioning, budgeting, place-and-route, and physical verification.
- Experience with power-grid and clock specifications; knowledge of verification tools such as Conformal LP, LEC, RedHawk, and Calibre.
Tools
Perl, TCL, Conformal LP, LEC, RedHawk, Calibre
Model-written summary · the original posting is authoritative