Apple
CPU Implementation Silicon Correlation Engineer
$185K–$325K
Santa Clara, California · Full-time · Posted Apr 14, 2026
- Experience
- 10+ years of relevant industry experience.
- Education
- Minimum BS.
About the job
Analyzes pre- and post-silicon data to correlate CPU physical design targets with measured silicon performance, power, and timing.
What you'll do
- Obtain process-related silicon measurement data and analyze pre-silicon timing runs against measured silicon parameters.
- Evaluate the return on investment of design and methodology features with post-silicon teams.
- Analyze post-silicon speed-debug data to identify and root-cause failing paths.
What they ask for
- Experience with a chip tapeout of a custom or PnR block.
- Experience with STA.
- Experience running spice simulations and analysis.
- Experience with data parsing, analysis, and representation/plotting skills.
Nice to have
- Chip design experience, including CPU design; good understanding of std cell architecture and design.
- Working knowledge of device technology and spice models; familiarity with ATPG pattern framework and PNR tool flows; proficiency in TCL, Perl, and Python; ability to work with cross-functional teams.
Pay
USD $184,700 to $324,800 base salary
Tools
STA, spice, ATPG, PNR, TCL, Perl, Python
Model-written summary · the original posting is authoritative