Apple
CPU Microarchitect/RTL Engineer
$129K–$195K
Santa Clara, California · Full-time · Posted Apr 14, 2026
- Education
- Minimum BS
About the job
Develops CPU multi-level cache subsystem architecture and RTL for multi-processor systems, from specification through verification and physical design delivery.
What you'll do
- Develop and specify microarchitecture, from architectural exploration to detailed specification.
- Own and refine RTL to meet power, performance, area, and timing goals; support verification and performance exploration.
- Work with cross-functional teams to implement and verify physical design for timing, area, reliability, testability, and power.
What they ask for
- Minimum BS.
- Experience with at least one of Verilog or VHDL.
Nice to have
- Expertise in one or more listed CPU areas, including cache and memory subsystems, instruction execution, machine-learning hardware mapping, or power and thermal management.
- Understanding of low-power and high-performance CPU microarchitecture techniques; experience with C or C++ and Perl or Python.
Pay
$129,300 and $194,700 USD base salary
Tools
Verilog, VHDL, C, C++, Perl, Python
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