Apple
CPU Microarchitect/RTL Engineer
$129K–$195K
Santa Clara, California · Full-time · Posted Oct 15, 2025
- Education
- Minimum BS
About the job
Develops CPU multi-level cache subsystem architecture and RTL for multiprocessor systems, from specification through verification and design delivery.
What you'll do
- Develop and specify microarchitecture, from architectural exploration through detailed specification.
- Own and refine RTL to meet power, performance, area, and timing goals; support verification and performance correlation.
- Work with cross-functional teams to implement and verify physical design for timing, area, reliability, testability, and power.
What they ask for
- Minimum BS.
- Experience with at least one of Verilog or VHDL.
Nice to have
- Expertise in one or more listed CPU architecture areas, including caches, execution, branch prediction, machine-learning hardware mapping, or power and thermal management.
- Understanding of low-power and high-performance CPU microarchitecture techniques; experience with C or C++ and Perl or Python.
Pay
USD $129,300 to $194,700 base salary
Tools
Verilog, VHDL, C, C++, Perl, Python
AI focus
No explicit AI work stated; machine-learning algorithms and mapping to hardware are listed as a preferred expertise area.
Model-written summary · the original posting is authoritative