Apple
CPU Microarchitect/RTL Engineer - Execution, Load/Store
$166K–$325K
Beaverton, Oregon +2 · Full-time · Posted Apr 14, 2026
- Location
- Beaverton, Oregon
Santa Clara, California
Waltham, Massachusetts - Experience
- 10+ years of relevant industry experience.
- Education
- Minimum BS.
About the job
Develop CPU microarchitecture and RTL for high-performance processor execution and load/store units, supporting verification, performance analysis, and physical design delivery.
What you'll do
- Develop microarchitecture and detailed specifications for CPU execution units.
- Own and refine RTL to meet power, performance, area, and timing goals; support functional verification.
- Explore and validate performance strategies and collaborate on physical design implementation.
What they ask for
- Experience with microprocessor architecture and logic design principles, including timing and power implications.
- Experience with Verilog or VHDL.
- Experience with simulators and waveform debugging.
- Minimum BS.
Nice to have
- Expertise in out-of-order execution, instruction scheduling, integer or floating-point execution, load/store execution, or cache and memory subsystems.
- Understanding of low-power or high-performance CPU microarchitecture techniques; C/C++, Perl, or Python experience.
Pay
$184,700 and $324,800 (base salary); $165,800 and $292,400 (base salary)
Tools
Verilog, VHDL, C, C++, Perl, Python
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