CPU Microarchitect/RTL Engineer - Execution, Load/Store

What you'll do

• Explore and specify microarchitecture, from early architectural concepts through detailed specifications.
• Develop and refine RTL to meet power, performance, area, and timing goals; support verification through testbench development, formal methods, and simulation/emulation.
• Explore performance strategies and collaborate on physical design implementation and verification, including timing, area, reliability, testability, and power.

What they ask for

• Minimum BS and 3+ years of relevant industry experience.
• Experience with microprocessor architecture.
• Experience with logic design principles and their timing and power implications.
• Experience in Verilog or VHDL, simulators, and waveform debugging.

Nice to have

• Expertise in one or more of: out-of-order execution, instruction scheduling, integer and floating-point execution, load/store execution, or cache and memory subsystems.
• Understanding of low-power microarchitecture techniques and high-performance CPU microarchitecture trade-offs; experience in C or C++ and Perl or Python.

Pay

$150,400 and $277,600 (base salary)

Tools

Verilog, VHDL, C, C++, Perl, Python