Drimva

Apple

CPU Microarchitect/RTL Engineer

Austin, Texas · Full-time · Posted Apr 14, 2026

Education
Minimum BS.

About the job

Architect and develop RTL for next-generation CPUs, from microarchitecture specification through validation and design delivery.

What you'll do

  • Develop microarchitecture specifications and refine RTL features to meet power, performance, area, and timing goals.
  • Support testbench development, simulation, functional and performance verification, and performance exploration.
  • Collaborate with engineering teams to implement and validate physical design for timing, area, reliability, testability, and power.

What they ask for

  • Minimum BS.
  • Experience with either Verilog or VHDL.

Nice to have

  • Experience with microprocessor architecture, simulators and waveform debugging tools such as Verdi, and logic design principles.
  • Understanding of CPU microarchitecture tradeoffs and techniques; experience with Perl or Python.

Tools

Verilog, VHDL, Verdi, Perl, Python

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 4, 2026 (UTC)