Apple
CPU Microarchitect/RTL Engineer - Fetch, Out of Order
$150K–$278K
Santa Clara, California · Full-time · Posted Apr 14, 2026
- Experience
- 3+ years of relevant industry experience.
- Education
- Minimum BS.
About the job
Develop CPU front-end and out-of-order subsystem architecture and RTL for high-performance, low-power processor cores, supporting verification, performance analysis, and design delivery.
What you'll do
- Develop microarchitecture and detailed specifications, and own or refine RTL to meet power, performance, area, and timing goals.
- Support functional verification through testbench development, formal methods, and simulation or emulation.
- Explore and correlate performance, and work with cross-functional teams on physical design implementation and verification.
What they ask for
- Bachelor’s degree or higher (minimum BS).
- Experience with microprocessor architecture and logic design principles, including timing and power implications.
- Experience in Verilog or VHDL.
- Experience with simulators and waveform debugging.
Nice to have
- Expertise in areas such as out-of-order execution, instruction scheduling, execution units, or cache and memory subsystems; knowledge of low-power or high-performance CPU microarchitecture techniques.
- Experience in C or C++, Perl, or Python.
Pay
$150,400 and $277,600 USD base salary
Tools
Verilog, VHDL, C, C++, Perl, Python
Model-written summary · the original posting is authoritative