Apple
CPU Microarchitect/RTL Engineer - Fetch, Out of Order
$166K–$325K
Beaverton, Oregon +2 · Full-time · Posted Oct 29, 2025
- Location
- Beaverton, Oregon
Santa Clara, California
Waltham, Massachusetts - Experience
- 10+ years of relevant industry experience.
- Education
- Minimum BS.
About the job
Develop CPU front-end and/or out-of-order subsystem architecture and RTL for high-performance, low-power Apple processor cores.
What you'll do
- Develop microarchitecture and specifications, from architectural exploration through detailed design.
- Own or refine RTL to meet power, performance, area, and timing goals; support verification and performance correlation.
- Collaborate across engineering teams to implement and verify physical design for timing, area, reliability, testability, and power.
What they ask for
- Minimum BS degree.
- Experience with microprocessor architecture.
- Experience with logic design principles and their timing and power implications.
- Experience with Verilog or VHDL, simulators, and waveform debugging.
Nice to have
- Expertise in instruction fetch and decode, branch prediction, instruction scheduling, register renaming, or out-of-order execution.
- Understanding of low-power and high-performance CPU microarchitecture techniques; experience in C or C++ and Perl or Python.
Pay
$184,700 to $324,800 (base salary); $165,800 to $292,400 (base salary)
Tools
Verilog, VHDL, C, C++, Perl, Python
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