Apple
CPU Physical Design Engineer
$185K–$325K
Beaverton, Oregon +1 · Full-time · Posted Apr 13, 2026
- Location
- Beaverton, Oregon
Santa Clara, California - Experience
- 10+ years of relevant industry experience.
- Education
- Minimum BS.
About the job
Delivers block-level CPU physical design from RTL to GDS, converging performance, power, and area goals and coordinating backend closure with cross-functional teams.
What you'll do
- Drive RTL-to-GDS convergence using logic synthesis and place-and-route tools, and deliver block-level physical design.
- Close backend flows and electrical requirements while improving silicon yield.
- Collaborate on CPU floorplanning, timing, power, reliability, testability, and memory and standard-cell co-optimization.
What they ask for
- Minimum BS and 10+ years of relevant industry experience.
- Experience in logic design and digital circuits.
- Experience with Perl or TCL.
Nice to have
- Experience in low-power, high-frequency physical design and industry-standard synthesis, PnR, STA, and power analysis tools.
- Knowledge of deep sub-micron technology and its timing, power, and area implications.
Pay
$184,700 to $324,800 (base salary)
Tools
Perl, TCL, logic synthesis, place-and-route, STA
Model-written summary · the original posting is authoritative