Apple
CPU Physical Electrical Analysis Engineer
Beaverton, Oregon · Full-time · Posted Jun 12, 2026
- Experience
- 10+ years of relevant industry experience.
- Education
- Minimum BS.
About the job
Implement CPU block-level physical electrical analysis and drive EMIR verification and sign-off closure for Apple silicon designs.
What you'll do
- Drive block- and top-level EMIR/electrical verification closure.
- Design, construct, and implement power grids using existing infrastructure or custom solutions in a PNR tool environment.
- Coordinate with CAD/EDA vendors and methodology, implementation, and SoC teams to support analysis fidelity, design closure, and IP delivery.
What they ask for
- Bachelor of Science degree.
- Experience with silicon-level power delivery, electromigration, and IR drop analysis.
- Experience scripting SAPR or EMIR flow automation for large-scale design and analysis data processing, debugging, and sensitivity isolation.
Nice to have
- Experience implementing high-performance, low-power VLSI designs and with SAPR/PNR design-flow infrastructure.
- Working knowledge of Apache Redhawk, Cadence Voltus, and PNR implementation, layout, verification, and STA tools.
Tools
SAPR, EMIR, PNR, Apache Redhawk, Cadence Voltus, STA
Model-written summary · the original posting is authoritative