Apple
CPU Power Management Microarchitect/RTL Engineer
$166K–$325K
Beaverton, Oregon +2 · Full-time · Posted Oct 29, 2025
- Location
- Beaverton, Oregon
Santa Clara, California
Waltham, Massachusetts - Experience
- 10+ years of relevant industry experience.
- Education
- BS
About the job
Develops CPU power-management architecture and RTL, supporting verification, performance exploration, and physical design delivery.
What you'll do
- Develop and specify microarchitecture, from early exploration through detailed specification.
- Own, assess, and refine RTL to meet power, performance, area, and timing goals; support functional verification.
- Explore performance strategies and collaborate on physical design implementation and verification.
What they ask for
- BS degree and 10+ years of relevant industry experience.
- Experience with microprocessor architecture and logic design principles, including timing and power implications.
- Experience in Verilog or VHDL.
- Experience with simulators and waveform debugging.
Nice to have
- Expertise in CPU power-management areas such as DVFS/DVFM, thermal and energy management, or clocking; understanding of low-power and high-performance CPU microarchitecture techniques.
- Experience in C or C++ and an interpretive language such as Perl or Python.
Pay
USD $184,700 to $324,800 base salary; USD $165,800 to $292,400 base salary
Tools
Verilog, VHDL, C, C++, Perl, Python
Model-written summary · the original posting is authoritative