Drimva

Apple

CPU Power Management Microarchitect/RTL Engineer

$150K–$278K

Santa Clara, California · Full-time · Posted Oct 29, 2025

Experience
3+ years of relevant industry experience.
Education
Minimum BS.

About the job

Develop CPU power-management architecture and RTL, supporting verification, performance analysis, and physical-design delivery for Apple silicon.

What you'll do

  • Develop microarchitecture and detailed specifications for CPU power-management solutions.
  • Own or refine RTL to meet power, performance, area, and timing goals; support functional verification.
  • Explore and verify performance strategies, and collaborate on physical design implementation.

What they ask for

  • BS degree and 3+ years of relevant industry experience.
  • Experience with microprocessor architecture and logic design principles, including timing and power implications.
  • Experience in Verilog or VHDL.
  • Experience with simulators and waveform debugging.

Nice to have

  • Expertise in power-management areas such as DVFS/DVFM, thermal and energy management, power states, clocking, or power integrity.
  • Experience with C or C++, Perl or Python; understanding of low-power or high-performance CPU microarchitecture techniques.

Pay

$150,400 and $277,600 USD base salary

Tools

Verilog, VHDL, C, C++, Perl, Python

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 5, 2026 (UTC)