Drimva

Apple

DDR Design Engineer

Austin, Texas · Full-time · Posted May 1, 2026

Education
Bachelor of Science in Electrical Engineering.

About the job

Designs and verifies digital logic for DDR PHYs, from concept and architecture through silicon bring-up and characterization.

What you'll do

  • Conduct concept studies and guide design trade-offs for performance, gate count, and power; write design specifications and test plans.
  • Create RTL with assertions and use formal tools and static checkers; support verification, coverage, and timing closure.
  • Support silicon bring-up and characterize performance and power.

What they ask for

  • Bachelor of Science in Electrical Engineering.

Nice to have

  • RTL design using Verilog or SystemVerilog, including assertions; experience with state machines, data paths, arbitration, and clock domain crossing logic.
  • Experience with synthesis and timing constraints; DFT, Unified Power Format, and equivalence checking; DDR PHY or mixed-signal design exposure.

Tools

RTL, Verilog, SystemVerilog, Unified Power Format

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 5, 2026 (UTC)