Apple
DDR Design Engineer
Beaverton, Oregon · Full-time · Posted Nov 12, 2025
- Experience
- Minimum 10 years of relevant experience.
- Education
- BS degree in a technical discipline.
About the job
Design DDR PHY logic from concept and architecture through RTL development, verification, silicon bring-up, and performance and power characterization.
What you'll do
- Conduct concept studies and guide digital design tradeoffs in performance, gate count, and power; write design specifications and test plans.
- Develop RTL with assertions and use formal tools and static checkers; support verification, coverage, and timing closure.
- Support silicon bring-up and characterize performance and power.
What they ask for
- BS degree in a technical discipline.
- Minimum 10 years of relevant experience.
Nice to have
- RTL design using Verilog or SystemVerilog and assertion writing; experience with state machines, data paths, arbitration, clock domain crossing, synthesis, timing constraints, DFT, UPF, and equivalence checking.
- Prior DDR PHY design experience in a mixed-signal environment.
Tools
Verilog, SystemVerilog, Unified Power Format
Model-written summary · the original posting is authoritative