Apple
DDR Design Engineer
$123K–$214K
Irvine, California · Full-time · Posted Apr 22, 2026
- Education
- Bachelor of Science in Electrical Engineering.
About the job
Design and verify DDR PHY digital logic from concept and architecture through silicon bring-up and characterization.
What you'll do
- Conduct concept studies and guide design trade-offs in performance, gate count, and power; write specifications and test plans.
- Develop RTL, use formal tools and static checkers, and support verification, coverage, and timing closure.
- Support silicon bring-up and performance and power characterization.
What they ask for
- Bachelor of Science in Electrical Engineering.
Nice to have
- RTL design using Verilog or SystemVerilog and assertion writing; state machines, data paths, arbitration, or clock-domain-crossing logic.
- Synthesis, timing constraints, DFT, UPF, equivalence checking, or prior DDR PHY and mixed-signal experience.
Pay
$122,700 and $214,300 (base salary range; USD).
Tools
RTL, Verilog, SystemVerilog, Unified Power Format
Model-written summary · the original posting is authoritative