Apple
DDR Design Engineer
$123K–$214K
San Diego, California · Full-time · Posted Apr 22, 2026
- Education
- Bachelor of Science in Electrical Engineering.
About the job
Design and verify DDR PHY digital logic from concept and architecture through silicon bring-up and characterization.
What you'll do
- Conduct concept studies and guide design choices for performance, gate count, and power; write specifications and test plans with partner teams.
- Develop RTL with assertions and use formal tools and static checkers; support verification, coverage, and timing closure.
- Support silicon bring-up and characterize performance and power.
What they ask for
- Bachelor of Science in Electrical Engineering.
Nice to have
- RTL design using Verilog or SystemVerilog and assertion writing; experience with state machines, datapaths, arbitration, or clock-domain crossing logic.
- Logic synthesis, timing constraints, DFT, UPF, equivalence checking, or prior DDR PHY and mixed-signal experience.
Pay
$122,700 and $214,300 USD base salary
Tools
Verilog, SystemVerilog, Unified Power Format
Model-written summary · the original posting is authoritative