Apple
DDR Design Engineer
$166K–$292K
Waltham, Massachusetts · Full-time · Posted Nov 17, 2025
- Experience
- Minimum 10 years of relevant experience.
- Education
- BS degree in technical discipline.
About the job
Design and develop DDR PHY logic from concept and architecture through verification, silicon bring-up, and performance and power characterization.
What you'll do
- Conduct concept studies and guide design tradeoffs for performance, gate count, and power; write design specifications and test plans.
- Create RTL with assertions and use formal tools and static checkers to ensure quality; support verification and drive coverage and timing closure.
- Support silicon bring-up and characterize performance and power.
What they ask for
- BS degree in a technical discipline.
- Minimum 10 years of relevant experience.
Nice to have
- RTL design using Verilog or SystemVerilog, assertion writing, and experience with state machines, data paths, arbitration, or clock domain crossing logic.
- Experience with logic synthesis, timing constraints, DFT, Unified Power Format, equivalence checking, or DDR PHY design in a mixed-signal environment.
Pay
$165,800 to $292,400 USD base salary
Tools
Verilog, SystemVerilog, Unified Power Format
Model-written summary · the original posting is authoritative