Drimva

Apple

DDR Design Engineer

Beaverton, Oregon · Full-time · Posted Apr 22, 2026

Education
Bachelor of Science in Electrical Engineering.

About the job

Designs and verifies DDR PHY digital logic from concept and architecture through silicon bring-up and characterization.

What you'll do

  • Conduct concept studies and guide design choices for performance, gate count, and power; write design specifications and test plans.
  • Develop RTL with assertions and use formal tools and static checkers; support verification, coverage, and timing closure.
  • Support silicon bring-up and characterize performance and power.

What they ask for

  • Bachelor of Science in Electrical Engineering.

Nice to have

  • RTL design using Verilog or SystemVerilog and assertion writing; experience designing state machines, data paths, arbitration, or clock domain crossing logic.
  • Experience with logic synthesis, timing constraints, DFT, Unified Power Format, equivalence checking, or DDR PHY design in a mixed-signal environment.

Tools

Verilog, SystemVerilog, Unified Power Format

Model-written summary · the original posting is authoritative

First seen Oct 15, 2026 · Last verified Nov 4, 2026 (UTC)