Apple
DDR Design Engineer
$116K–$203K
Waltham, Massachusetts · Full-time · Posted Apr 20, 2026
- Education
- Bachelor of Science in Electrical Engineering.
About the job
Design and characterize DDR PHY logic from concept and architecture through RTL verification, timing closure, and silicon bring-up.
What you'll do
- Conduct concept studies and guide digital design tradeoffs for performance, gate count, and power; write design specifications and test plans.
- Develop RTL with assertions, use formal tools and static checkers, and support verification, coverage, and timing closure.
- Support silicon bring-up and characterize performance and power.
What they ask for
- Bachelor of Science in Electrical Engineering.
Nice to have
- RTL design using Verilog or SystemVerilog and assertion writing; design of state machines, data paths, arbitration, and clock domain crossing logic.
- Logic synthesis and timing constraints; DFT, Unified Power Format, equivalence checking, or DDR PHY and mixed-signal experience.
Pay
$116,400 and $203,000 (USD, base salary)
Tools
Verilog, SystemVerilog, Unified Power Format
Model-written summary · the original posting is authoritative