Apple
DDR Design Engineer
$129K–$225K
Cupertino, California · Full-time · Posted Apr 22, 2026
- Education
- Bachelor of Science in Electrical Engineering.
About the job
Designs and verifies digital DDR PHY logic from concept and architecture through silicon bring-up and characterization.
What you'll do
- Conduct concept studies and guide digital design trade-offs for performance, gate count, and power; write design specifications and test plans.
- Create RTL, use formal tools and static checkers, and support verification, coverage, and timing closure.
- Support silicon bring-up and characterize performance and power.
What they ask for
- Bachelor of Science in Electrical Engineering.
Nice to have
- RTL design using Verilog or SystemVerilog and assertion writing; state machines, datapaths, arbitration, and clock-domain crossing logic.
- Logic synthesis, timing constraints, DFT, Unified Power Format, equivalence checking, or experience with DDR PHY design and mixed-signal environments.
Pay
$129,300 and $225,300 USD base salary
Tools
Verilog, SystemVerilog, Unified Power Format
Model-written summary · the original posting is authoritative