Apple
DDR Design Engineer
$175K–$308K
San Diego, California · Full-time · Posted Nov 12, 2025
- Experience
- Minimum 10 years of relevant experience.
- Education
- BS degree in technical discipline
About the job
Design and verify DDR PHY digital logic from concept and architecture through silicon bring-up and performance and power characterization.
What you'll do
- Conduct concept studies and guide design choices for performance, gate count, and power; write design specifications and test plans.
- Create RTL with assertions, use formal tools and static checkers, and support verification, coverage, and timing closure.
- Support silicon bring-up and characterize performance and power.
What they ask for
- BS degree in a technical discipline.
- Minimum 10 years of relevant experience.
Nice to have
- RTL design using Verilog or SystemVerilog and assertion writing.
- Prior experience in DDR PHY design and a mixed-signal environment is a plus.
Pay
$175,000 to $308,500 USD base salary
Tools
Verilog, SystemVerilog, Unified Power Format
Model-written summary · the original posting is authoritative