Apple
Design Verification Engineer
$150K–$278K
Cupertino, California +2 · Full-time · Posted Apr 9, 2026
- Location
- Cupertino, California
Santa Clara, California
Sunnyvale, California - Experience
- Minimum of 3 years relevant industry experience.
- Education
- BS
About the job
Verifies the functionality and performance of Apple SoCs or their IP and subsystems by planning and executing design verification with cross-functional teams.
What you'll do
- Review design and architecture specifications and work with design and micro-architecture teams to understand functional and performance goals.
- Develop test plans, tests, and coverage plans; define verification methodology and testbenches.
- Collaborate with design, architecture, and software teams to identify use cases and corner conditions and drive test cases.
What they ask for
- Minimum of BS + 3 years relevant industry experience.
Nice to have
- Knowledge of SystemVerilog, digital simulation and debug, computer architecture, and digital design fundamentals.
- Experience with constrained-random verification, coverage, assertions, UVM, scripting, and software programming; C/C++ or assembly is a plus.
Pay
$150,400 to $277,600 USD base salary
Tools
SystemVerilog, Python, Perl, UVM, C/C++
Model-written summary · the original posting is authoritative