Apple
Design Verification Engineer
$185K–$325K
Beaverton, Oregon +2 · Full-time · Posted Feb 5, 2026
- Location
- Beaverton, Oregon
Cupertino, California
Santa Clara, California - Experience
- Minimum of 10 years relevant industry experience.
- Education
- BS
About the job
Verifies the functionality and performance of Apple SoCs and IP by developing test plans, tests, coverage plans, and verification methodologies.
What you'll do
- Review design and architecture specifications and collaborate with design and micro-architecture teams.
- Develop test plans, tests, coverage plans, testbenches, and verification methodology.
- Work with design, architecture, and software teams to understand use cases and corner conditions and drive test cases.
What they ask for
- Minimum of BS + 10 years relevant industry experience.
Nice to have
- Skills in digital verification, including constrained random verification, functional and code coverage, and assertion methodology.
- Knowledge of SystemVerilog, digital simulation and debug, computer architecture, digital design fundamentals, programming, scripting, and verification methodologies such as UVM.
Pay
$184,700 and $324,800 (base salary range)
Tools
SystemVerilog, Python, Perl, UVM, C/C++
AI focus
Verification may involve Neural Engine hardware; the posting does not specify other AI work.
Model-written summary · the original posting is authoritative