Apple
Design Verification Engineer
$185K–$325K
Cupertino, California +2 · Full-time · Posted Apr 9, 2026
- Location
- Cupertino, California
Santa Clara, California
Sunnyvale, California - Experience
- Minimum of 10 years relevant industry experience.
- Education
- BS
About the job
Verifies the functionality and performance of Apple SoCs or their IP and subsystems by developing test plans, tests, coverage plans, and verification methodologies.
What you'll do
- Review design and architecture specifications and collaborate with design and micro-architecture teams.
- Develop test plans, tests, coverage plans, verification methodologies, and testbenches.
- Work with design, architecture, and software teams to understand use cases and corner conditions and drive test cases.
What they ask for
- Minimum of BS + 10 years relevant industry experience.
Nice to have
- Knowledge of SystemVerilog, digital simulation and debug, computer architecture, digital design fundamentals, and verification methodologies like UVM.
- Experience with Python, Perl, or similar scripting language; C/C++ and assembly are a plus.
Pay
$184,700 and $324,800 (base salary range; USD)
Tools
SystemVerilog, Python, Perl, UVM, C/C++, assembly
AI focus
The posting lists Neural Engine hardware among the IP that may be verified; it does not specify other AI work.
Model-written summary · the original posting is authoritative