Apple
Design Verification Engineer
$166K–$292K
Cary, North Carolina +2 · Full-time · Posted Sep 10, 2026
- Location
- Cary, North Carolina
Melbourne, Florida
Waltham, Massachusetts - Experience
- Minimum 10 years relevant industry experience.
- Education
- BS degree in technical subject area.
About the job
Performs pre-silicon design verification for SoC/IP designs to enable functional first silicon, from test planning and environment development through debug, coverage, and sign-off.
What you'll do
- Study design specifications, create test plans, and develop SystemVerilog/UVM verification infrastructure, including stimulus, checkers, assertions, and coverage.
- Run verification plans and regressions; debug failures, close bugs, and track verification progress using metrics such as bugs and coverage.
- Use LLMs to improve the efficiency and quality of verification.
What they ask for
- BS degree in a technical subject area.
- Minimum 10 years of relevant industry experience.
Nice to have
- Deep knowledge of OOP, SystemVerilog, and UVM; scalable and portable testbench development; verification methodologies and tools.
- Working experience using LLMs; experience with power-aware (UPF) verification; scripting with Python, Perl, or TCL.
Pay
$165,800 and $292,400 (base salary)
Tools
SystemVerilog, UVM, LLMs, UPF, Python, Perl, TCL, PCIe
AI focus
Use LLMs and related technologies to make verification more efficient and improve quality.
Model-written summary · the original posting is authoritative