Apple
Design Verification Engineer
Beaverton, Oregon · Full-time · Posted Oct 30, 2026
- Experience
- Minimum 3 years of relevant industry experience.
- Education
- BS degree in technical subject area; MS degree in a technical subject area preferred.
About the job
Develop pre-silicon verification for SoC/IP designs to help deliver functional first silicon, from test planning and environment development through debug and sign-off.
What you'll do
- Study design specifications, create test plans, and develop verification methodology and environments.
- Build SystemVerilog/UVM infrastructure, including stimulus, checkers, assertions, and coverage; run regressions and resolve failures.
- Track verification progress and use LLMs to improve verification efficiency and quality.
What they ask for
- BS degree in a technical subject area.
- Minimum 3 years of relevant industry experience.
- Strong knowledge of OOP, SystemVerilog, and UVM.
- Experience developing scalable, portable testbenches and using verification methodologies and tools.
Nice to have
- MS degree in a technical subject area and relevant industry experience; experience with LLMs, power-aware verification, scripting languages, or formal verification.
- Experience with serial protocols such as PCIe or USB, or parallel protocols such as DDR.
Tools
SystemVerilog, UVM, LLMs, UPF, Python, Perl, TCL, PCIe
AI focus
Use LLMs and related technologies to improve verification efficiency and quality.
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