Apple
Design Verification Engineer
$129K–$195K
Cupertino, California +2 · Full-time · Posted Apr 10, 2026
- Location
- Cupertino, California
Santa Clara, California
Sunnyvale, California - Experience
- Minimum of 0 years of relevant industry experience.
- Education
- BS
About the job
Verifies the functionality and performance of Apple SOCs, IPs, or subsystems by developing tests and verification plans and analyzing results.
What you'll do
- Review design and architecture specifications and collaborate with design, micro-architecture, architecture, and software teams.
- Develop test plans, tests, coverage plans, verification methodologies, and testbenches.
- Run and triage regressions, track bugs, and analyze coverage.
What they ask for
- BS degree.
- Knowledge of computer architecture and digital design fundamentals.
- Knowledge of Verilog or SystemVerilog, digital simulation, and debug.
- Experience with Python, Perl, or a similar scripting language.
Nice to have
- Experience with C/C++ or assembly.
- Ability to work independently and strong interpersonal skills.
Pay
$129,300 and $194,700 (base salary)
Tools
Verilog, SystemVerilog, Python, Perl, C/C++, assembly
Model-written summary · the original posting is authoritative